july 2009 ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsa2147 rev. 1.0.1 fsa2147 ? low-voltage, dpst analog switch with negative signal capability and built-in termination to eliminate pop fsa2147 ? low-voltage, dpst analog switch with negative signal capability and built-in termination to eliminate pop features ? built-in termination on unselected audio paths inhibits audio pop ? 6pf typical switch off capacitance ? 2.5 ? typical on resistance ? negative-swing-capable ? power-off protection ? flow-through pin out eliminates pcb vias applications ? mp3 player, cell phone, pda, digital camera, and notebook computers description the fsa2147 is a double-pole, single throw (dpst) switch. the audio path defaults to audio mute and is enabled with /oe. the fsa2147 includes a power-off feature on the common port when v cc =0v to guarantee signal isolation. important note: for additional information, please contact analogswitch@fairchildsemi.com . ordering information part number top mark operating temperature range eco status package description packing method FSA2147K8X 2147 -40c to +85c rohs 8-lead us8, jedec mo-187, variation ca, 3.0mm wide package 3000 units tape and reel for fairchild?s definition of eco status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html . v cc /oe r l r l control block rpu r t r t figure 1. analog symbol
? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsa2147 rev. 1.0.1 2 fsa2147 ? low-voltage, dpst analog switch with negative signal capability and built-in termination to eliminate pop pin configuration vcc gnd nc /r /l l r /oe 1 2 3 4 8 7 6 5 figure 2. 8-pin us8 pin descriptions pin # name description 8 v cc power supply. 7 /oe output enable. this pin defaults high, allowing the user to mute the audio channel during power up. the audio path is only connected when /oe is driven low. 6, 5 r, l audio right and left input sources. 2, 3 /r, /l audio common connector port. truth table v cc /oe switch low open high low on high high open
? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsa2147 rev. 1.0.1 3 fsa2147 ? low-voltage, dpst analog switch with negative signal capability and built-in termination to eliminate pop absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. symbol parameter min. max. units v cc supply voltage -0.5 4.6 v /oe output enable control signal -0.5 4.6 v v sw switch i/o voltage (1) v cc ?4.6 4.6 v i ik input clamp diode current - 50 ma i sw switch i/o current (continuous) 100 ma i swpeak peak switch current (pulsed at 1ms duration, <10% duty cycle) 150 ma t stg storage temperature range -65 + 150 c t j maximum junction temperature +150 c t l lead temperature (soldering, 10 seconds) + 260 c i/o to gnd 12 all other pins 2 human body model, jedec: jesd22-a114 v cc to gnd 12 esd charged discharge model, jedec: jesd22-c101 2 kv note : 1. the input and output negative ratings may be exceeded if the input and output diode current ratings are observed. recommended operating conditions the recommended operating conditions table defines the conditions for actual device operation. recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. symbol parameter min. max. units v cc supply voltage 2.7 4.3 v /oe output enable control signal 3.0 4.3 v v sw switch i/o voltage v cc -4.3 4.3 v t a operating temperature -40 +85 c
? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsa2147 rev. 1.0.1 4 fsa2147 ? low-voltage, dpst analog switch with negative signal capability and built-in termination to eliminate pop dc electrical characteristics all typical values are at 25oc unless otherwise specified. t a = -40 to +85c symbol parameter v cc (v) conditions min. typ. (5) max. unit common pins v ik clamp diode voltage 3.0 i ik = -18ma -1.2 v ih control input voltage high 2.7 to 4.3 1.7 v il control input voltage low 2.7 to 4.3 0.6 v i in /oe input leakage current 4.3 v in = 4.3v 1 -1 a i off power off leakage current (common port only /r, /l) 0 common port (/r, /l) v sw = 4.3v or floating -10 10 a i nc(0n) on-leakage current of port /r or /l 4.3 /r, /l = 0.3v, 4.0v r, l = floating figure 8 -250 1 250 na r pu, /oe internal pull-up resistor 4.3 3 m r t audio path termination resistors 4.3 v in =0.3v or 4.0v 100 v audio analog signal range 2.7 to 4.3 v cc- 4.3v v cc v r onaudio switch on resistance (2) 2.7 v l/r = -1.5v, 0v,1.5v i on = 60ma 1.5 3.0 ? ? r onaudio delta r on (3) 2.7 v l/r = 0.7v i on = 60ma 0.4 ? r flat(audio) r on flatness (4) 2.7 v sw =-1.5v to 1.5v, i on = 60ma 0.4 0.8 ? power supply i cc quiescent supply current 4.3 /oe = low or v cc , i out = 0 1.5 15 a notes : 2. on resistance is determined by the voltage drop between the a and b pins at the indicated current through the switch. 3. ? r on = r on max ? r on min measured at identical v cc , temperature, and voltage. 4. flatness is defined as the difference between the maximum and minimum values of on resistance over the specified range of conditions. 5. guaranteed by characterization; not production tested.
? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsa2147 rev. 1.0.1 5 fsa2147 ? low-voltage, dpst analog switch with negative signal capability and built-in termination to eliminate pop ac electrical characteristics all typical value are for v cc = 3.6v at 25oc unless otherwise specified. t a = - 40 to +85c symbol parameter v cc (v) conditions min. typ. (6) max. unit t on turn-on time, /oe to output 2.7 to 4.3 v/ r,/l = 1.0v r l = 50 ? , c l = 50pf figure 9, figure 10, figure 11 2 s t off turn-off time, /oe to output 2.7 to 4.3 v /r,/l = 1.0v r l = 50 ? , c l = 50pf figure 9, figure 10, figure 11 2 s xtalk non-adjacent channel crosstalk (audio mode) 3.3 to 4.3 f = 20khz, r t = 32 ? , c l = 0pf figure 16 -75 db thd total harmonic distortion (audio mode) 3.0 to 4.3 f = 20hz to 20 khz r l = 32 ? , v in = 2v pp figure 14 0.05 % snr signal-to-noise ratio (audio mode) 3.3 to 4.3 f = 20khz to 20khz, r l = 32 ? , v in = 2v pp figure 14 80 db note : 6. guaranteed by characterization; not production tested. capacitance all typical values are at 25oc unless otherwise specified. note : 7. guaranteed by characterization; not production tested. t a = - 40 to +85c symbol parameter v cc (v) conditions min. typ. (7) max. unit c in control pin input capacitance 3.0 to 4.3 v bias = 0.2v 2.5 pf
? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsa2147 rev. 1.0.1 6 fsa2147 ? low-voltage, dpst analog switch with negative signal capability and built-in termination to eliminate pop typical characteristics 0.00 1.00 2.00 3.00 4.00 -2.00 -1.00 0.00 1.00 2.00 v in r on ( ) -40c 25c 85c figure 3. r on , v cc =2.7v 0.00 1.00 2.00 3.00 4.00 -2.00 -1.00 0.00 1.00 2.00 v in r on ( ) -40c 25c 85c figure 4. r on , v cc =2.7v 0.00 0.01 0.02 0.03 0.04 0.05 0.06 0 1 10 100 frequency (khz) harmonic distortion (%) v cc =3.0v v cc =3.6v v cc =4.3v figure 5. total harmonic distortion
? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsa2147 rev. 1.0.1 7 fsa2147 ? low-voltage, dpst analog switch with negative signal capability and built-in termination to eliminate pop test diagrams i on v on gnd gnd v in dn /oe v s =0 tov cc r on =v on /i on gnd v in id n(off) v s = 0 or v cc nc a each switch port is tested separately. /oe figure 6. on resistance figure 7. off leakage v cntrl =fn (v cc ) i a(on) v sw gnd a d+/r or d - r/l r l r s c l * hsd v in v /oe gnd gnd gnd v out r l ,r s ,andc l are functions of the application environment (see tables for specific values). *c l includes test fixture and stray capacitance. figure 8. on leakage figure 9. ac test circuit load t rise = 2.5ns t on t off input ? /oe output ? v out t fall = 2.5ns v oh 90% v cc /2 v cc /2 90% 10% 10% 90% 90% v ol v cc gnd v cntrl =fn(v cc ) input -v cntrl t rise =1s gnd v cc v th(max) 90% 10% 10% t fall =1s output -v out 90% v oh v ol t on t off 90% v th(min) figure 10. turn-on / turn-off waveforms figure 11. turn-on / turn-off waveforms
? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsa2147 rev. 1.0.1 8 fsa2147 ? low-voltage, dpst analog switch with negative signal capability and built-in termination to eliminate pop test diagrams (continued) capacitance meter f=1mhz v cntrl = fn (v cc ) r/l or /r or /l r/l or /r or /l capacitance meter f=240mhz v cntrl = fn (v cc ) r/l or /r or /l r/l or /r or /l figure 12. channel off capacitance figure 13. channel on capacitance v out gnd gnd r t gnd gnd v s r s audio analyzer v cntrl gnd r s and r t are functions of the application environment (see tables for specific values). v in v cntrol = fn (v cc ) r s and r t are functions of the application environment (see tables for specific values). v out gnd gnd r t gnd gnd v s r s network analyzer r t gnd v cntrl gnd off isolation = 20 log (v out /v in ) v cntrl =fn ( v v cc ) v in figure 14. total harmonic distortion figure 15. channel off isolation v out gnd gnd r t gnd gnd v s r s network analyzer r t gnd v gnd nc crosstalk = 20 log (v out /v in ) v in r s and r t are functions of the application environment (see tables for specific values gnd gnd gnd cntrl v cntrl =fn ( v cc ) figure 16. non-adjacent channel-to-channel crosstalk
? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsa2147 rev. 1.0.1 9 fsa2147 ? low-voltage, dpst analog switch with negative signal capability and built-in termination to eliminate pop physical dimensions 0.30 typ seating plane 0.10-0.18 0.13 ab c c. dimensions are exclusive of burrs, mold flash, d. dimensions and tolerances per ansi y14.5m, 1982. and tie bar extrusions. mab08arevc 0.50typ b. dimensions are in millimeters. a. conforms to jedec registration mo-187 -c- 0.17-0.27 0.10 0.00 detail a 0-8 0.4 typ -b- 0.700.10 all lead tips 0.2 c b a 3.1.1 0.15 pin #1 ident. 0.90 max all lead tips 0.1 c 1.55 8 1 4 2.30.1 5 -a- 0.70 2.70 3.40 1.00 0.5 typ detail a 1.80 gage plane 0.12 figure 17. 8-lead us8, jedec mo-187, variation ca, 3.0mm wide package package drawings are provided as a service to customers considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ .
? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsa2147 rev. 1.0.1 10 fsa2147 ? low-voltage, dpst analog switch with negative signal capability and built-in termination to eliminate pop
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